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| march 1994 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. tisp30xxf3 (lv) overvoltage protector series tisp3072f3,tisp3082f3 low-voltage dual bidirectional thyristor overvoltage protectors device symbol sl package (top view) p package (top view) ion-implanted breakdown region precise and stable voltage low voltage overshoot under surge planar passivated junctions low off-state current <10 a rated for international surge wave shapes these low-voltage dual bidirectional thyristor protectors are designed to protect isdn applications against transients caused by lightning strikes and a.c. power lines. offered in two voltage variants to meet battery and protection requirements, they are guaranteed to suppress and withstand the listed international lightning surges in both polarities. transients are initially clipped by breakdown clamping until the voltage rises to the breakover level, which causes the device to crowbar. the high crowbar holding current prevents d.c. latchup as the current subsides. these monolithic protection devices are fabricated in ion-implanted planar structures to ensure precise and matched breakover control and are virtually transparent to the system in normal operation. how to order d package (top view) description .............................................. ul recognized component device v drm v v (bo) v 3072f3 58 72 3082f3 66 82 waveshape standard i tsp a 2/10 s gr-1089-core 80 8/20 s iec 61000-4-5 70 10/160 s fcc part 68 60 10/700 s itu-t k.20/21 fcc part 68 50 10/560 s fcc part 68 45 10/1000 s gr-1089-core 35 1 2 3 45 6 7 8 g g g g nc t r nc nc - no internal connection r g t g t g g r 1 2 3 45 6 7 8 specified t terminal ratings require connection of pins 1 and 8. specified r terminal ratings require connection of pins 4 and 5. md1xab 1 2 3 t g r g tr sd3xaa terminals t, r and g correspond to the alternative line designators of a, b and c *rohs directive 2002/95/ec jan 27 2003 including annex device package carrier tisp30xxf3 d, small-outline tape and reeled tisp30xxf3dr p, plastic dip tube tisp30xxf3p sl, single-in-line tube tisp30xxf3sl tisp30xxf3dr-s tisp30xxf3p-s tisp30xxf3sl-s insert xx value corresponding to protection voltages of 72 and 82 for standard termination finish order as for lead free termination finish order as *r o h s c o m p l ia n t v e r s io n s a v a il a b l e
march 1994 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. rating symbol value unit re petitive peak off-state voltage, 0 c < t a < 70 c 3072f3 3082f3 v drm 58 66 v non-repetitive peak on-state pulse current (see notes 1 and 2) i ppsm a 1/2 (gas tube differential transient, 1/2 voltage wave shape) 120 2/10 (telcordia gr-1089-core, 2/10 voltage wave shape) 80 1/20 (itu-t k.22, 1.2/50 voltage wave shape, 25 ? resi stor) 50 8/20 (iec 61000-4-5, combination wave generator, 1.2/50 voltage wave shape) 70 10/160 (fcc part 68, 10/160 voltage wave shape) 60 4/250 (itu-t k.20/21, 10/700 voltage wave shape, simultaneous) 55 0.2/310 (cnet i 31-24, 0.5/700 voltage wave shape) 38 5/310 (itu-t k.20/21, 10/700 voltage wave shape, single) 50 5/320 (fcc part 68, 9/720 voltage wave shape, single) 50 10/560 (fcc part 68, 10/560 voltage wave shape) 45 10/1000 (telcordia gr-1089-core, 10/1000 voltage wave shape) 35 non-repetitive peak on-state current, 0 c < t a < 70 c(see not es 1 and 3) 50 hz, 1 s d package p pa ckage sl pa ckage i tsm 4.3 5.7 7.1 a initial rate of rise of on-state current, linear current ramp, maximum ramp value < 38 a di t /dt 250 a/ s j unction temperature t j -65 to +150 c storag e temperature range t stg -65 to +150 c notes: 1. further details on surge wave shapes are contained in the applications information section. 2. initially the tisp m ust be in thermal equilibrium with 0 c march 1994 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. t ypical characteristics - r and g or t and g terminals figure 2. figure 3. figure 4. figure 5. t j - junction temperature - c -25 0 25 50 75 100 125 150 i d - off-state current - a 0 001 0 01 0 1 1 10 100 tc3laf v d = -50 v v d = 50 v t j - junction temperature - c -25 0 25 50 75 100 125 150 normalized breakdown voltages 0.9 1.0 1.1 1.2 tc3lai v (bo) v (br) v (br)m positive polarity normalized to v (br) i (br) = 100 a and 25 c t j - junction temperature - c -25 0 25 50 75 100 125 150 normalized breakdown voltages 0.9 1.0 1.1 1.2 tc3laj v (bo) v (br) v (br)m negative polarity normalized to v ( br) i (br) = 100 a and 25 c v t - on-state voltage - v 23456789 11 0 i t - on-state current - a 1 10 100 tc3lal -40 c 150 c 25 c off-state current vs junction temperature normalized breakdown voltages vs junction temperature normalized breakdown voltages vs junction temperature on-state current vs on-state voltage tisp30xxf3 (lv) overvoltage protector series march 1994 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. tisp30xxf3 (lv) overvoltage protector series t ypical characteristics - r and g or t and g terminals fi gure 6. figure 7. fi gure 8. figure 9. t j - junction temperature - c -25 0 25 50 75 100 125 150 i h , i (bo) - holding current, breakover current - a 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0.1 1.0 tc3lah i (bo) i h di/d t - rate of rise of principle current - a/ s 0 001 0 01 0 1 1 10 100 norm alized breakover voltage 1.0 1.1 1.2 1.3 tc3lab positive negative te rminal voltage - v 0 1 1 10 off-state capacitance - pf 10 100 tc3lae 50 positive bias negative bias t j - junction temperature - c -25 0 25 50 75 100 125 150 off-stat e capacitance - pf 10 100 tc 3lad 500 term inal bias = 0 term inal bias = 50 v term inal bias = -50 v holding current & breakover current vs junction temperature normalized breakover voltage vs rate of rise of principle current off-state capacitance vs terminal voltage off-state capacitance vs junction temperature march 1994 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. t ypical characteristics - r and g or t and g terminals figure 10. decay time - s 10 100 1000 m aximum surge current - a 10 100 1000 tc3laa 2 surge current vs decay time tisp30xxf3 (lv) overvoltage protector series march 1994 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. tisp30xxf3 (lv) overvoltage protector series t ypical characteristics - r and t terminals figure 11. figure 12. fi gure 13. figure 14. t j - junction temperature - c -25 0 25 50 75 100 125 150 i d - off-state current - a 0 001 0 01 0 1 1 10 100 tc 3lag v d = 50 v t j - junction temperature - c -25 0 25 50 75 100 125 150 normalized breakdown voltages 0.9 1.0 1.1 1.2 tc3lak v (bo) v (br) v (br)m both polarities normalized to v (br) i ( br) = 100 a and 25 c di/d t - rate of rise of principle current - a/ s 0 001 0 01 0 1 1 10 100 normalized breakover voltage 1.0 1.1 1.2 1.3 tc3lac term inal voltage - v 0 1 1 10 o ff-state capacitance -pf 20 30 40 50 60 70 80 90 10 100 tc3xaa 50 d package p package sl package both voltage polarities off-state current vs junction temperature normalized breakdown voltages vs junction temperature normalized breakdown voltages vs rate of rise of principal current off-state capacitance vs terminal voltage march 1994 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. thermal information figure 15. figure 16. t - current duration - s 0 1 1 10 100 1000 i trms - ma ximum non-recurrent 50 hz current - a 1 10 d package sl pa c kage ti3laa p package v gen = 250 vrms r gen = 10 to 150 t - power pulse duration - s 0 0001 0 001 0 01 0 1 1 10 100 1000 z j a - transient thermal impedance - c/w 1 10 100 d package p package sl package ti3maa maximum non-recurring 50 hz current vs current duration thermal response tisp30xxf3 (lv) overvoltage protector series march 1994 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. the electrical characteristics of a tisp device are strongly dependent on junction temperature, t j . hence, a characteristic value will depend on the junction temperature at the instant of measurement. the values given in this data sheet were measured on commercial test ers, which generally minimize the temperature rise caused by testing. application values may be calculated from the parameters?temperatur e coefficient, the power dissipated and the thermal response curve, z (see m. j. maytum, ?ransient suppressor dynamic parameters.?ti technical journal, vol. 6, no. 4, pp.63-70, july-august 1989). electrical characteristics lightning surge w ave shape notation generators current rating a pplications information tisp30xxf3 (lv) overvoltage protector series most lightning tests, used for equipment verification, specify a unidirectional sawtooth waveform which has an exponential rise and an exponential decay. wave shapes are classified in terms of peak amplitude (voltage or current), rise time and a decay time to 50 % of the maximum amplitude. the notation used for the wave shape is amplitude, rise time/decay time . a 50 a, 5/310 s wave shape would have a peak current value of 50 a, a rise time of 5 s and a decay time of 310 s. the tisp device surge current graph comprehends the wave shapes of commonly used surges. there are three categories of surge generator type, single wave shape, combination wave shape and circuit defined. single wave shape generators have essentially the same wave shape for the open circuit voltage and short circuit current (e.g., 10/1000 s open circuit voltage and short circuit current). combination generators have two wave shapes, one for the open circuit voltage and the other for the short circuit current (e.g., 1.2/50 s open circuit voltage and 8/20 s short circuit current). circuit specified generators usually equate to a combination generator, although typically only the open circuit voltage waveshape is referenced (e.g. a 10/700 s open circuit voltage generator typically produces a 5/310 s short circuit current). if the combination or circuit defined generators operate into a finite resistance, the wave shape produced is intermediate between the open circuit and short circuit values. when the tisp deviceswitches into the on-state, it has a very low impedance. as a result, although the surge wave shape may be defined in terms of open circuit voltage, it is the current wave shape that must be used to assess the required tisp surge capability. as an example, the itu-t k.21 1.5 kv, 10/700 s open circuit voltage surge is changed to a 38 a, 5/310 s current waveshape when driving into a short circuit. thus, the tisp surge current capability, when directly connected to the generator, will be found for the itu-t k.21 waveform at 310 s on the surge graph and not 700 s. some common short circuit equivalents are tabulated below: standard open circuit voltage short circuit current itu-t k.21 1.5 kv, 10/700 s 37.5 a, 5/310 s itu-t k.20 1 kv, 10/700 s25a, 5/310 s ie c 61000-4-5, combination wave generator 1.0 kv, 1.2/50 s500a, 8/20 s te lc ordia gr-1089-core 1.0 kv, 10/1000 s 100 a, 10/1000 s te lc ordia gr-1089-core 2.5 kv, 2/10 s500a, 2/10 s fcc part 68, type a 1.5 kv, <10/>160 s 200 a,<10/>160 s fcc part 68, ty pe a 800 v, <10/>560 s 100 a,<10/>160 s fcc part 68, type b 1.5 kv, 9/720 s 37.5 a, 5/320 s any series resistance in the protected equipment will reduce the peak circuit current to less than the generators?short circui t value. a 1 kv open circuit voltage, 100 a short circuit current generator has an effective output impedance of 10 ? (1000/100). if the equipment has a series r esistance of 25 ? , then the surge current requirement of the tisp device becomes 29 a (1000/35) and not 100 a. march 1994 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. the protection voltage, (v (bo) ), increases under lightning surge conditions due to thyristor regeneration. this increase is dependent on the rate of current rise, di/dt, when the tisp device is clamping the voltage in its breakdown region. the v (bo) value under surge conditions can be estimated by multiplying the 50 hz rate v (bo) (250 v/ms) value by the normalized increase at the surge s di/dt (figure 7). an estimate of the di/dt can be made from the surge generator voltage rate of rise, dv/dt, and the circuit resistance. as an example, the itu-t k.21 1.5 kv, 10/700 s surge has an average dv/dt of 150 v/ s, but, as the rise is exponential, the initial dv/dt is higher, being in the region of 450 v/ s. the instantaneous generator output resistance is 25 ? . if the equipment has an additional series r esistance of 20 ? , the total series resistance becomes 45 ? . the maximum di/dt then can be estimated as 450/45 = 10 a/ s. in practice, the measured di/dt and protection voltage increase will be lower due to inductive effects and the finite slope resistance of the ti sp breakdown r egion. capacitance off-state capacitance protection voltage tisp30xxf3 (lv) overvoltage protector series figure 17. v d - rms ac test voltage - mv 110100 1000 normalized capacitance 0.70 0.75 0.80 0.85 0.90 0.95 1.00 1.05 aixxaa normalized to v d = 100 mv dc bias, v d = 0 normalized capacitance vs rms ac test voltage the off-state capacitance of a tisp device is sensitive to junction temperature, t j , and the bias voltage, comprising of the d.c. voltage, v d , and the a.c. voltage, v d . all the capacitance values in this data sheet are measured with an a.c. voltage of 100 mv. the typical 25 c variation of capacitance value with a.c. bias is shown in figure 17. when v d >> v d , the capacitance value is independent on the value of v d . the capacitance is essentially constant over the range of normal telecommunication frequencies. a pplications information march 1994 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. figure 18 shows a three terminal tisp device with its equivalent ?elta?capacitance. each capacitance, c tg , c rg and c tr , is the true terminal pair capacitance measured with a three terminal or guarded capacitance bridge. if wire r is biased at a larger potenti al than wire t, then c tg >c rg . capacitance c tg is equivalent to a capacitance of c rg in parallel with the capacitive difference of (c tg -c rg ). the line capacitive unbalance is due to (c tg -c rg ) and the capacitance shunting the line is c tr +c rg /2. all capacitance measurements in this data sheet are three terminal guarded to allow the designer to accurately assess capacitiv e unbalance effects. simple two terminal capacitance meters (unguarded third terminal) give false readings as the shunt capacitance via the third terminal is included. a pplications information tisp30xxf3 (lv) overvoltage protector series longitudinal balance figure 18. c tg c rg c tr equipment t r g (c tg -c rg ) c rg c tr equipment t r g c rg c tg > c rg equivalent unbalance aixxab march 1994 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. mechanical data tisp30xxf3 (lv) overvoltage protector series d008 plastic small-outline package notes: a. l eads are within 0.25 (0.010) radius of true position at maximum material condition. b. body dime nsions do not include mold flash or protrusion. c. mold flas h or protrusion shall not exceed 0.15 (0.006). d. l ead tips to be planar within 0.051 (0 .002). d008 8 765 4 3 2 1 8-pin small outline microelectronic standard package ms-012, jedec publication 95 mdxx aac index 4.80 - 5.00 (0.189 - 0.197) 5.80 - 6.20 (0.228 - 0.244) 3.81 - 4.00 (0.150 - 0.157) 1.35 - 1.75 (0.053 - 0.069) 0.102 - 0.203 (0.004 - 0.008) 0.28 - 0.79 (0.011 - 0.031) 0.51 - 1.12 (0.020 - 0.044) 4.60 - 5.21 (0.181 - 0.205) 0.36 - 0.51 (0.014 - 0.020) 0.25 - 0.50 (0.010 - 0.020) 0.190 - 0.229 (0.0075 - 0.0090) pin spacing 1.27 (0.050) (see note a) 6 places x 45 n0m 8 places 7 nom 4 places 7 nom 3 places 4 4 dimensions are: metric (inches) this small-outline package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. the compou nd will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated i n high humidity conditions. leads require no additional cleaning or processing when used in soldered assembly. march 1994 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. mechanical data tisp30xxf3 (lv) overvoltage protector series d008 tape dimensions 0.8 (0.03) 1.50 (.059) 3.90 - 4.10 (.154 - .161) 5.40 - 5.60 (.213 - .220) 1.95 - 2.05 (.077 - .081) 7.90 - 8.10 (.311 - .319) 6.30 - 6.50 (.248 - .256) 11.70 - 12.30 (.461 - .484) d008 pa ckage (8-pin small out line) single-sprocket tape direct ion of feed ? min. carrier tape embo ssment cover tape notes: a. ta ped devices are supplied on a reel of the following dimensions:- reel diam eter: reel hub diameter: reel axial hole: b. 2500 devices are on a reel. md xxatb dimensions are: metric (inches) 330 +0.0/-4.0 (12.992 +0.0/-.157) 100 2.0 (3.937 .079) 13.0 0.2 (.512 .008) 0 min. min. 0.40 (0.016) 2.0 - 2.2 (.079 - .087) 1.50 - 1.60 (.059 - .063) march 1994 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. mechanical data tisp30xxf3 (lv) overvoltage protector series d008 plastic dual-in-line package this dual-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. the compoun d will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated i n high humidity conditions. the package is intended for insertion in mounting-hole rows on 7.62 (0.300) centers. once the leads are co mpressed and inserted, sufficient tension is provided to secure the package in the board during soldering. leads require no additional clean ing or processing when used in soldered assembly. p008 3 12 4 8765 seating plane notes: a. each pin center line is locate d within 0.25 (0.010) of its true longitudinal position. b. dimensio ns fa ll within jedec ms 001 - r-pdip-t, 0.300" dual-in-line plastic family. mdxxcf index notch 9.25 - 9.75 (0.364 - 0.384) 6.10 - 6.60 (0.240 - 0.260) 5.08 (0.200) 1.78 (0.070) max. 4 places 8 places max. 3.17 (0.125) min. 0.51 (0.020) min. 2.54 (0.100) typical (see note a) 6 places 0.38 - 0.53 (0.015 - 0.021) 7.62 - 8.23 (0.300 - 0.324) 8.38 - 9.40 (0.330 - 0.370) 0.20 - 0.36 (0.008 - 0.014) dimensions are: metric (inches) march 1994 - revised february 2005 specifications are subject to change without notice. customers should verify actual device performance in their specific applications. mechanical data tisp30xxf3 (lv) overvoltage protector series sl003 3-pin plastic single-in-line package this single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. the compo und will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated i n high humidity conditions. leads require no additional cleaning or processing when used in soldered assembly. sl003 2 1 3 notes: a. each pin centerline is located within 0.25 (0.010) of its true longitudinal position. b. body molding flas h of up to 0.15 (0.006) may occur in the package lead plane. mdxxce index notch 9.25 - 9.75 (0.364 - 0.384) 3.20 - 3.40 (0.126 - 0.134) 6.10 - 6.60 (0.240 - 0.260) 0.203 - 0.356 (0.008- 0.014) 0.559 - 0.711 (0.022 - 0.028) 3 places 12.9 (0.492) dimensions are: metric (inches) 4.267 (0.168) min. max. 1.854 (0.073) max. 8.31 (0.327) max. 2.54 (0.100) typical (see note a) 2 places ?isp?is a trademark of bourns, ltd., a bourns company, and is registered in u.s. patent and trademark office. ?ourns?is a registered trademark of bourns, inc. in the u.s. and other countries. |
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